<\/span><\/p>\n<\/p><\/div>\nPuya Semiconductor l\u00e0 nh\u00e0 cung c\u1ea5p h\u00e0ng \u0111\u1ea7u chuy\u00ean v\u1ec1 c\u00e1c gi\u1ea3i ph\u00e1p b\u1ed9 nh\u1edb \u0111i\u1ec7n t\u0129nh c\u00f4ng su\u1ea5t th\u1ea5p (Flash v\u00e0 EEPROM), c\u0169ng nh\u01b0 c\u00e1c MCU ti\u00ean ti\u1ebfn. L\u00f5i Arm\u00ae Cortex\u00ae – M0+\/M4 32-bit c\u1ee7a h\u1ecd khai th\u00e1c c\u00f4ng ngh\u1ec7 Flash hi\u1ec7u su\u1ea5t cao v\u00e0 \u0111\u1eb7t tr\u1ecdng t\u00e2m v\u00e0o thi\u1ebft k\u1ebf ti\u00eau th\u1ee5 \u0111i\u1ec7n n\u0103ng c\u1ef1c th\u1ea5p. V\u1edbi th\u00e2m ni\u00ean trong vi\u1ec7c ph\u00e1t tri\u1ec3n gi\u1ea3i ph\u00e1p, Puya t\u1ef1 h\u00e0o s\u1edf h\u1eefu \u0111\u1ed9i ng\u0169 h\u1ed7 tr\u1ee3 k\u1ef9 thu\u1eadt t\u1eadn t\u00e2m, \u0111\u1ea3m b\u1ea3o kh\u00e1ch h\u00e0ng nh\u1eadn \u0111\u01b0\u1ee3c h\u1ed7 tr\u1ee3 k\u1ef9 thu\u1eadt to\u00e0n di\u1ec7n. H\u01a1n n\u1eefa, Puya \u0111\u00e3 thi\u1ebft l\u1eadp m\u1ed9t m\u1ea1ng l\u01b0\u1edbi k\u00eanh b\u00e1n h\u00e0ng r\u1ed9ng kh\u1eafp khu v\u1ef1c Ch\u00e2u \u00c1 – Th\u00e1i B\u00ecnh D\u01b0\u01a1ng (APAC), v\u1edbi c\u00e1c v\u0103n ph\u00f2ng chi nh\u00e1nh t\u1ea1i Nh\u1eadt B\u1ea3n v\u00e0 H\u00e0n Qu\u1ed1c. Puya c\u0169ng h\u1ee3p t\u00e1c v\u1edbi c\u00e1c k\u00eanh \u0111\u1ea1i di\u1ec7n t\u1ea1i Vi\u1ec7t Nam, Singapore<\/span>, \u1ea4n \u0110\u1ed9, Israel<\/span>, Th\u00e1i Lan v\u00e0 c\u00e1c \u0111\u1ecba \u0111i\u1ec3m kh\u00e1c \u0111\u1ec3 cung c\u1ea5p h\u1ed7 tr\u1ee3 k\u1ef9 thu\u1eadt h\u00e0ng \u0111\u1ea7u, b\u1ea3n \u0111\u1ecba h\u00f3a cho kh\u00e1ch h\u00e0ng \u0111\u1ecba ph\u01b0\u01a1ng.<\/p>\n\u00d4ng Cao Yuxin<\/span>, Ph\u00f3 Ch\u1ee7 t\u1ecbch R&D t\u1ea1i Puya Semiconductor, cho bi\u1ebft: “Ch\u00fang t\u00f4i r\u1ea5t vui m\u1eebng \u0111\u01b0\u1ee3c c\u1ed9ng t\u00e1c v\u1edbi IAR. IAR Embedded Workbench for Arm \u0111\u01b0\u1ee3c c\u00f4ng nh\u1eadn r\u1ed9ng r\u00e3i l\u00e0 gi\u1ea3i ph\u00e1p d\u1eabn \u0111\u1ea7u v\u1ec1 ph\u00e1t tri\u1ec3n t\u00edch h\u1ee3p nh\u00fang trong ng\u00e0nh. L\u1ea7n h\u1ee3p t\u00e1c n\u00e0y ch\u1eafc ch\u1eafn s\u1ebd mang l\u1ea1i s\u1ef1 h\u1ed7 tr\u1ee3 ph\u00e1t tri\u1ec3n to\u00e0n di\u1ec7n cho d\u00f2ng s\u1ea3n ph\u1ea9m MCU c\u1ee7a Puya. D\u00f2ng s\u1ea3n ph\u1ea9m MCU c\u1ee7a Puya Semiconductor \u1ee9ng d\u1ee5ng r\u1ed9ng r\u00e3i tr\u00ean nhi\u1ec1u l\u0129nh v\u1ef1c kh\u00e1c nhau, bao g\u1ed3m thi\u1ebft b\u1ecb \u0111eo d\u00e0nh cho ng\u01b0\u1eddi ti\u00eau d\u00f9ng, thi\u1ebft b\u1ecb nh\u1ecf, IoT c\u00f4ng nghi\u1ec7p, ch\u0103m s\u00f3c s\u1ee9c kh\u1ecfe, \u0111i\u1ec1u khi\u1ec3n \u0111\u1ed9ng c\u01a1 v\u00e0 thi\u1ebft b\u1ecb \u0111o \u0111\u1ea1c”.<\/p>\nHi\u1ec7n t\u1ea1i, Puya \u0111\u00e3 tung ra nhi\u1ec1u lo\u1ea1i s\u1ea3n ph\u1ea9m MCU \u0111a d\u1ea1ng, bao g\u1ed3m d\u00f2ng Arm\u00ae Cortex\u00ae – M0+\/M4 32-bit. Nh\u1eefng s\u1ea3n ph\u1ea9m n\u00e0y \u0111\u01b0\u1ee3c \u00e1p d\u1ee5ng r\u1ed9ng r\u00e3i tr\u00ean nhi\u1ec1u l\u0129nh v\u1ef1c kh\u00e1c nhau, bao g\u1ed3m \u0111i\u1ec7n t\u1eed ti\u00eau d\u00f9ng, Internet V\u1ea1n V\u1eadt (IoT), ch\u0103m s\u00f3c s\u1ee9c kh\u1ecfe, ki\u1ec3m so\u00e1t c\u00f4ng nghi\u1ec7p, v.v. Ch\u00fang \u0111\u00f3ng vai tr\u00f2 l\u00e0 n\u1ec1n t\u1ea3ng c\u00f4ng ngh\u1ec7 v\u1eefng ch\u1eafc nh\u1eb1m th\u00fac \u0111\u1ea9y s\u1ef1 \u0111\u1ed5i m\u1edbi v\u00e0 ti\u1ebfn b\u1ed9 trong c\u00e1c ng\u00e0nh c\u00f4ng nghi\u1ec7p \u0111a d\u1ea1ng.<\/p>\n
IAR Embedded Workbench for Arm l\u00e0 l\u1ef1a ch\u1ecdn \u01b0u ti\u00ean \u0111\u1ec3 ph\u00e1t tri\u1ec3n ph\u1ea7n m\u1ec1m nh\u00fang trong s\u1ed1 h\u00e0ng ch\u1ee5c ngh\u00ecn nh\u00e0 l\u1eadp tr\u00ecnh tr\u00ean to\u00e0n c\u1ea7u. S\u1ea3n ph\u1ea9m bao g\u1ed3m c\u00e1c tr\u00ecnh bi\u00ean d\u1ecbch \u0111\u01b0\u1ee3c t\u1ed1i \u01b0u h\u00f3a cao gi\u00fap t\u1ea1o m\u00e3 th\u1ef1c thi hi\u1ec7u qu\u1ea3 \u0111\u1ec3 t\u1ed1i \u0111a h\u00f3a hi\u1ec7u su\u1ea5t MCU. Ph\u1ea7n m\u1ec1m c\u0169ng cung c\u1ea5p c\u00e1c t\u00ednh n\u0103ng d\u00f2 t\u00ecm v\u00e0 g\u1ee1 l\u1ed7i n\u00e2ng cao, ch\u1eb3ng h\u1ea1n nh\u01b0 c\u00e1c \u0111i\u1ec3m d\u1eebng d\u1eef li\u1ec7u v\u00e0 m\u00e3 linh ho\u1ea1t, ph\u00e2n t\u00edch ng\u0103n x\u1ebfp th\u1eddi gian ch\u1ea1y v\u00e0 tr\u1ef1c quan h\u00f3a ng\u0103n x\u1ebfp cu\u1ed9c g\u1ecdi. C\u00e1c c\u00f4ng c\u1ee5 ph\u00e2n t\u00edch m\u00e3, C-STAT v\u00e0 C-RUN c\u00f3 th\u1ec3 gi\u00fap c\u00e1c nh\u00e0 l\u1eadp tr\u00ecnh x\u00e1c \u0111\u1ecbnh v\u1ea5n \u0111\u1ec1 ti\u1ec1m \u1ea9n \u1edf giai \u0111o\u1ea1n \u0111\u1ea7u v\u00e0 c\u1ea3i thi\u1ec7n ch\u1ea5t l\u01b0\u1ee3ng m\u00e3. H\u01a1n n\u1eefa, IAR Embedded Workbench for Arm cung c\u1ea5p phi\u00ean b\u1ea3n an to\u00e0n ch\u1ee9c n\u0103ng \u0111\u01b0\u1ee3c T\u00dcV S\u00dcD ch\u1ee9ng nh\u1eadn, gi\u00fap ng\u01b0\u1eddi d\u00f9ng \u0111\u1ea9y nhanh qu\u00e1 tr\u00ecnh ch\u1ee9ng nh\u1eadn c\u00e1c s\u1ea3n ph\u1ea9m an to\u00e0n ch\u1ee9c n\u0103ng c\u1ee7a h\u1ecd.<\/p>\n
\u00d4ng Kiyo Uemura<\/span>, Ph\u00f3 Ch\u1ee7 t\u1ecbch IAR Ch\u00e2u \u00c1 Th\u00e1i B\u00ecnh D\u01b0\u01a1ng, cho bi\u1ebft: “S\u1ef1 h\u1ee3p t\u00e1c gi\u1eefa IAR v\u00e0 Puya Semiconductor s\u1ebd kh\u00f4ng ch\u1ec9 c\u1ee7ng c\u1ed1 chu\u1ed7i cung \u1ee9ng c\u1ee7a ng\u00e0nh b\u00e1n d\u1eabn m\u00e0 c\u00f2n t\u00edch c\u1ef1c th\u00fac \u0111\u1ea9y s\u1ef1 ph\u00e1t tri\u1ec3n c\u1ee7a h\u1ec7 sinh th\u00e1i t\u1ea1i th\u1ecb tr\u01b0\u1eddng h\u1ec7 th\u1ed1ng nh\u00fang. Ch\u00fang t\u00f4i s\u1ebd t\u1eadn d\u1ee5ng c\u00e1c ngu\u1ed3n l\u1ef1c trong khu v\u1ef1c c\u1ee7a m\u00ecnh \u0111\u1ec3 h\u1ed7 tr\u1ee3 ho\u00e0n to\u00e0n cho s\u1ef1 ph\u00e1t tri\u1ec3n hi\u1ec7u qu\u1ea3 c\u1ee7a ng\u00e0nh b\u00e1n d\u1eabn trong n\u01b0\u1edbc. B\u1eb1ng c\u00e1ch cung c\u1ea5p s\u1ef1 h\u1ed7 tr\u1ee3 v\u1ec1 c\u00f4ng c\u1ee5 ph\u00e1t tri\u1ec3n chuy\u00ean nghi\u1ec7p, ch\u00fang t\u00f4i kh\u00f4ng ch\u1ec9 gi\u00fap kh\u00e1ch h\u00e0ng \u0111\u1ea1t \u0111\u01b0\u1ee3c th\u00e0nh c\u00f4ng m\u00e0 c\u00f2n t\u00edch c\u1ef1c th\u00fac \u0111\u1ea9y s\u1ef1 th\u1ecbnh v\u01b0\u1ee3ng c\u1ee7a h\u1ec7 sinh th\u00e1i. H\u1ee3p t\u00e1c c\u00f9ng nhau, ch\u00fang t\u00f4i \u0111ang d\u1eabn \u0111\u1ea7u l\u00e0n s\u00f3ng \u0111\u1ed5i m\u1edbi ng\u00e0nh v\u00e0 \u0111\u00f3ng g\u00f3p nhi\u1ec1u s\u1ee9c m\u1ea1nh h\u01a1n cho s\u1ef1 ph\u00e1t tri\u1ec3n n\u0103ng \u0111\u1ed9ng c\u1ee7a l\u0129nh v\u1ef1c h\u1ec7 th\u1ed1ng nh\u00fang”.<\/p>\n\u0110\u1ec3 bi\u1ebft th\u00eam th\u00f4ng tin v\u1ec1 b\u1ed9 vi \u0111i\u1ec1u khi\u1ec3n d\u00f2ng Arm\u00ae Cortex\u00ae – M0+\/M4 32-bit c\u1ee7a Puya Semiconductor, vui l\u00f2ng truy c\u1eadp: www.puyasemi.com<\/a>. \u0110\u1ec3 bi\u1ebft th\u00eam th\u00f4ng tin v\u1ec1 IAR Embedded Workbench for Arm, vui l\u00f2ng truy c\u1eadp: www.iar.com\/arm<\/a>.<\/p>\n","protected":false},"excerpt":{"rendered":"IAR Embedded Workbench for Arm h\u1ed7 tr\u1ee3 to\u00e0n di\u1ec7n cho Arm\u00ae Cortex\u00ae – M0+\/M4 32-bit c\u1ee7a Puya Semiconductor. TH\u01af\u1ee2NG H\u1ea2I, 16\/10\/2023 \/PRNewswire\/ — IAR, c\u00f4ng ty h\u00e0ng \u0111\u1ea7u th\u1ebf gi\u1edbi v\u1ec1 ph\u1ea7n m\u1ec1m v\u00e0 d\u1ecbch v\u1ee5 d\u00e0nh cho l\u1eadp tr\u00ecnh nh\u00fang, vui m\u1eebng th\u00f4ng b\u00e1o v\u1ec1 vi\u1ec7c h\u1ed7 tr\u1ee3 to\u00e0n di\u1ec7n cho d\u00f2ng MCU Arm\u00ae Cortex\u00ae – […]\n","protected":false},"author":4,"featured_media":26137,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"om_disable_all_campaigns":false,"_monsterinsights_skip_tracking":false,"footnotes":""},"categories":[2293],"tags":[],"class_list":["post-26136","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-pr-newswire"],"yoast_head":"\n
Puya Semiconductor v\u00e0 IAR h\u1ee3p t\u00e1c nh\u1eb1m mang l\u1ea1i tr\u1ea3i nghi\u1ec7m \u0111\u1eb7c bi\u1ec7t cho c\u00e1c L\u1eadp tr\u00ecnh vi\u00ean nh\u00fang<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/saigonbiz.com\/vn\/puya-semiconductor-va-iar-hop-tac-nham-mang-lai-trai-nghiem-dac-biet-cho-cac-lap-trinh-vien-nhung\/\" \/>\n<meta property=\"og:locale\" content=\"vi_VN\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Puya Semiconductor v\u00e0 IAR h\u1ee3p t\u00e1c nh\u1eb1m mang l\u1ea1i tr\u1ea3i nghi\u1ec7m \u0111\u1eb7c bi\u1ec7t cho c\u00e1c L\u1eadp tr\u00ecnh vi\u00ean nh\u00fang\" \/>\n<meta property=\"og:description\" content=\"IAR Embedded Workbench for Arm h\u1ed7 tr\u1ee3 to\u00e0n di\u1ec7n cho Arm\u00ae Cortex\u00ae – M0+\/M4 32-bit c\u1ee7a Puya Semiconductor. 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