{"id":22048,"date":"2023-06-01T05:00:00","date_gmt":"2023-05-31T22:00:00","guid":{"rendered":"https:\/\/www.prnasia.com\/asia-story\/archive\/4075014_VI75014_11"},"modified":"2023-06-01T05:00:00","modified_gmt":"2023-05-31T22:00:00","slug":"ultrarisc-lua-chon-valtrix-sting-de-xac-minh-thiet-ke-risc-v-soc","status":"publish","type":"post","link":"https:\/\/saigonbiz.com\/vn\/ultrarisc-lua-chon-valtrix-sting-de-xac-minh-thiet-ke-risc-v-soc\/","title":{"rendered":"UltraRISC l\u1ef1a ch\u1ecdn Valtrix STING \u0111\u1ec3 x\u00e1c minh thi\u1ebft k\u1ebf RISC-V SoC"},"content":{"rendered":"<p><span class=\"legendSpanClass\"><span class=\"xn-location\">BANGALORE<\/span>, \u1ea4n \u0110\u1ed9<\/span>, <span class=\"legendSpanClass\">ng\u00e0y 1 th\u00e1ng 6 n\u0103m 2023<\/span> \/PRNewswire\/ &#8212;&nbsp;H\u00f4m nay, <a href=\"https:\/\/www.design-reuse.com\/exit\/?urlid=40817\" target=\"_blank\" rel=\"nofollow noopener noreferrer\">Valtrix Systems<\/a>, nh\u00e0 cung c\u1ea5p h\u00e0ng \u0111\u1ea7u trong ng\u00e0nh c\u00e1c s\u1ea3n ph\u1ea9m x\u00e1c minh thi\u1ebft k\u1ebf RISC-V \u0111\u1ec3 x\u00e2y d\u1ef1ng c\u00e1c tri\u1ec3n khai CPU v\u00e0 h\u1ec7 th\u1ed1ng tr\u00ean chip ch\u00ednh x\u00e1c v\u1ec1 m\u1eb7t ch\u1ee9c n\u0103ng, \u0111\u00e3 th\u00f4ng b\u00e1o r\u1eb1ng UltraRISC, nh\u00e0 cung c\u1ea5p h\u00e0ng \u0111\u1ea7u c\u00e1c IP RISC-V hi\u1ec7u su\u1ea5t cao v\u00e0 b\u1ed9 x\u1eed l\u00fd \u0111a l\u00f5i c\u00f3 tr\u1ee5 s\u1edf t\u1ea1i Th\u01b0\u1ee3ng H\u1ea3i, \u0111\u00e3 c\u1ea5p ph\u00e9p cho STING \u0111\u1ec3 x\u00e1c minh thi\u1ebft k\u1ebf tri\u1ec3n khai SoC RISC-V c\u1ee7a m\u00ecnh.<\/p>\n<p>STING, m\u1ed9t tr\u00ecnh t\u1ea1o k\u00edch th\u00edch th\u1eed nghi\u1ec7m d\u1ef1a tr\u00ean ph\u1ea7n m\u1ec1m c\u1ee7a Valtrix, c\u00f3 kh\u1ea3 n\u0103ng t\u1ea1o c\u00e1c ch\u01b0\u01a1ng tr\u00ecnh di \u0111\u1ed9ng t\u1ef1 ki\u1ec3m tra v\u00e0 s\u1eeda ch\u1eefa ki\u1ebfn tr\u00fac, c\u00f3 kh\u1ea3 n\u0103ng k\u00edch ho\u1ea1t tr\u00ean m\u00f4 ph\u1ecfng, gi\u1ea3 l\u1eadp, FPGA v\u00e0 silicon.<\/p>\n<p>Ch\u1ee7 t\u1ecbch ki\u00eam T\u1ed5ng gi\u00e1m \u0111\u1ed1c v\u00e0 Gi\u00e1m \u0111\u1ed1c c\u00f4ng ngh\u1ec7 c\u1ee7a UltraRISC, Ti\u1ebfn s\u0129 <span class=\"xn-person\">Jiang Jiang<\/span> cho bi\u1ebft: &#8220;C\u00f4ng ty ch\u00fang t\u00f4i ti\u1ebfn h\u00e0nh x\u00e1c minh nghi\u00eam ng\u1eb7t \u0111\u1ec3 \u0111\u1ea3m b\u1ea3o r\u1eb1ng b\u1ed9 x\u1eed l\u00fd c\u1ee7a ch\u00fang t\u00f4i \u0111\u01b0\u1ee3c thi\u1ebft k\u1ebf t\u1ed1i \u01b0u v\u00e0 x\u00e1c minh k\u1ef9 l\u01b0\u1ee1ng. C\u00f4ng c\u1ee5 STING c\u1ee7a Valtrix \u0111\u00e3 \u0111\u00f3ng g\u00f3p \u0111\u00e1ng k\u1ec3 v\u00e0o n\u1ed7 l\u1ef1c x\u00e1c minh c\u1ee7a ch\u00fang t\u00f4i tr\u00ean l\u00f5i b\u1ed9 x\u1eed l\u00fd UR-A1 c\u1ee7a UltraRISC, \u0111\u1eb7c bi\u1ec7t l\u00e0 ph\u1ea7n m\u1edf r\u1ed9ng c\u1ee7a tr\u00ecnh \u1ea3o h\u00f3a cho \u1ea3o h\u00f3a ph\u1ea7n c\u1ee9ng. Kh\u1ea3 n\u0103ng ch\u1ea1y th\u1eed nghi\u1ec7m qua m\u00f4 ph\u1ecfng v\u00e0 m\u00f4 ph\u1ecfng v\u00e0 gi\u1ea3 l\u1eadp khi\u1ebfn c\u00f4ng c\u1ee5 tr\u1edf th\u00e0nh l\u1ef1a ch\u1ecdn l\u00fd t\u01b0\u1edfng cho chi\u1ebfn l\u01b0\u1ee3c DV c\u1ee7a ch\u00fang t\u00f4i&#8221;.<\/p>\n<p>Shubhodeep Roy Choudhury, T\u1ed5ng gi\u00e1m \u0111\u1ed1c c\u1ee7a Valtrix cho bi\u1ebft: &#8220;Ch\u00fang t\u00f4i r\u1ea5t vui m\u1eebng \u0111\u01b0\u1ee3c h\u1ee3p t\u00e1c v\u1edbi UltraRISC v\u1edbi t\u01b0 c\u00e1ch l\u00e0 \u0111\u1ed1i t\u00e1c ch\u00ednh \u0111\u1ec3 cho ph\u00e9p STING x\u00e1c minh SoC \u0111\u1ed1i v\u1edbi c\u00e1c tri\u1ec3n khai RISC-V c\u1ea5p ti\u1ebfn c\u1ee7a h\u1ecd tr\u00ean c\u00e1c n\u1ec1n t\u1ea3ng m\u00f4 ph\u1ecfng ph\u1ea7n c\u1ee9ng&#8221;. &#8220;Vi\u1ec7c b\u1ed5 sung c\u00e1c chu k\u1ef3 ch\u1ea1y tr\u00ean gi\u1ea3 l\u1eadp b\u1eb1ng th\u1eed nghi\u1ec7m m\u00f4 ph\u1ecfng, FPGA v\u00e0 h\u1eadu silicon \u0111\u00f3ng vai tr\u00f2 r\u1ea5t quan tr\u1ecdng trong vi\u1ec7c \u0111\u1ea3m b\u1ea3o r\u1eb1ng c\u00e1c thi\u1ebft k\u1ebf CPU v\u00e0 SoC lu\u00f4n tu\u00e2n th\u1ee7 v\u00e0 kh\u00f4ng c\u00f3 l\u1ed7i ch\u1ee9c n\u0103ng. Kh\u1ea3 n\u0103ng t\u1ea1o k\u00edch th\u00edch di \u0111\u1ed9ng c\u1ee7a STING cho ph\u00e9p ng\u01b0\u1eddi d\u00f9ng ch\u1ea1y th\u1eed nghi\u1ec7m trong b\u1ea5t k\u1ef3 m\u00f4i tr\u01b0\u1eddng th\u1eed nghi\u1ec7m thi\u1ebft b\u1ecb n\u00e0o, t\u1eeb \u0111\u00f3 t\u0103ng kh\u1ea3 n\u0103ng t\u00e1i s\u1eed d\u1ee5ng v\u00e0 hi\u1ec7u qu\u1ea3 x\u00e1c minh,&#8221; \u00f4ng n\u00f3i th\u00eam.<\/p>\n<p>\u0110\u1ec3 bi\u1ebft th\u00eam th\u00f4ng tin v\u1ec1 c\u00f4ng ngh\u1ec7 v\u00e0 s\u1ea3n ph\u1ea9m x\u00e1c minh thi\u1ebft k\u1ebf c\u1ee7a Valtrix, h\u00e3y truy c\u1eadp: <a href=\"https:\/\/www.design-reuse.com\/exit\/?urlid=40817\" target=\"_blank\" rel=\"nofollow noopener noreferrer\">https:\/\/www.valtrix.in<\/a><\/p>\n<p><b>Gi\u1edbi thi\u1ec7u C\u00f4ng c\u1ee5 X\u00e1c minh Thi\u1ebft k\u1ebf Valtrix STING<\/b>&nbsp;<\/p>\n<p>STING, s\u1ea3n ph\u1ea9m ch\u1ee7 l\u1ef1c c\u1ee7a Valtrix, l\u00e0 m\u1ed9t c\u00f4ng c\u1ee5 x\u00e1c minh thi\u1ebft k\u1ebf \u0111\u01b0\u1ee3c h\u1ed7 tr\u1ee3 th\u01b0\u01a1ng m\u1ea1i \u0111\u1ec3 tri\u1ec3n khai d\u1ef1a tr\u00ean RISC-V. S\u1ea3n ph\u1ea9m c\u00f3 th\u1ec3 \u0111\u01b0\u1ee3c \u0111\u1ecbnh c\u1ea5u h\u00ecnh \u0111\u1ec3 t\u1ea1o c\u00e1c ch\u01b0\u01a1ng tr\u00ecnh kim lo\u1ea1i tr\u1ea7n di \u0111\u1ed9ng ch\u1ee9a k\u00edch th\u00edch th\u1eed nghi\u1ec7m t\u1ef1 ki\u1ec3m tra ch\u00ednh x\u00e1c v\u1ec1 m\u1eb7t ki\u1ebfn tr\u00fac, sau \u0111\u00f3 c\u00f3 th\u1ec3 \u0111\u01b0\u1ee3c k\u00edch ho\u1ea1t tr\u00ean m\u00f4 ph\u1ecfng, nguy\u00ean m\u1eabu FPGA, gi\u1ea3 l\u1eadp ho\u1eb7c silicon.<\/p>\n<p><b>Gi\u1edbi thi\u1ec7u v\u1ec1 UltraRISC<\/b><\/p>\n<p>C\u00f3 tr\u1ee5 s\u1edf ch\u00ednh t\u1ea1i Th\u01b0\u1ee3ng H\u1ea3i, Trung Qu\u1ed1c, UltraRISC ph\u00e1t tri\u1ec3n c\u00e1c b\u1ed9 x\u1eed l\u00fd \u0111a l\u00f5i v\u00e0 IP RISC-V hi\u1ec7u su\u1ea5t cao, ti\u1ebft ki\u1ec7m n\u0103ng l\u01b0\u1ee3ng v\u00e0 th\u00f4ng minh, \u0111\u1ed3ng th\u1eddi \u0111\u01b0\u1ee3c d\u00e0nh ri\u00eang \u0111\u1ec3 th\u00fac \u0111\u1ea9y h\u1ec7 sinh th\u00e1i RISC-V to\u00e0n c\u1ea7u. C\u00f4ng ty c\u00f3 ba d\u00f2ng s\u1ea3n ph\u1ea9m IP (UR-A, UR-AE v\u00e0 UR-E) trong d\u00f2ng l\u00f5i b\u1ed9 x\u1eed l\u00fd v\u00e0 m\u1ed9t d\u00f2ng b\u1ed9 x\u1eed l\u00fd \u0111a l\u00f5i d\u1ef1a tr\u00ean l\u00f5i UR-A trong d\u00f2ng SoC c\u1ee7a m\u00ecnh. C\u00e1c d\u1ecbch v\u1ee5 n\u00e0y \u0111\u01b0\u1ee3c thi\u1ebft k\u1ebf \u0111\u1ec3 \u0111\u00e1p \u1ee9ng c\u00e1c k\u1ecbch b\u1ea3n \u0111i\u1ec7n to\u00e1n ch\u00ednh, bao g\u1ed3m nh\u01b0ng kh\u00f4ng gi\u1edbi h\u1ea1n \u1edf c\u00e1c tr\u01b0\u1eddng h\u1ee3p s\u1eed d\u1ee5ng \u0111i\u1ec7n to\u00e1n bi\u00ean, m\u00e1y t\u00ednh \u0111\u1ec3 b\u00e0n, m\u00e1y ch\u1ee7, \u0111\u00e1m m\u00e2y v\u00e0 xe t\u1ef1 l\u00e1i.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>BANGALORE, \u1ea4n \u0110\u1ed9, ng\u00e0y 1 th\u00e1ng 6 n\u0103m 2023 \/PRNewswire\/ &#8212;&nbsp;H\u00f4m nay, Valtrix Systems, nh\u00e0 cung c\u1ea5p h\u00e0ng \u0111\u1ea7u trong ng\u00e0nh c\u00e1c s\u1ea3n ph\u1ea9m x\u00e1c minh thi\u1ebft k\u1ebf RISC-V \u0111\u1ec3 x\u00e2y d\u1ef1ng c\u00e1c tri\u1ec3n khai CPU v\u00e0 h\u1ec7 th\u1ed1ng tr\u00ean chip ch\u00ednh x\u00e1c v\u1ec1 m\u1eb7t ch\u1ee9c n\u0103ng, \u0111\u00e3 th\u00f4ng b\u00e1o r\u1eb1ng UltraRISC, nh\u00e0 cung c\u1ea5p [&#8230;]\n","protected":false},"author":4,"featured_media":50415,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"om_disable_all_campaigns":false,"_monsterinsights_skip_tracking":false,"footnotes":""},"categories":[2293],"tags":[],"class_list":["post-22048","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-pr-newswire"],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v21.6 (Yoast SEO v27.2) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>UltraRISC l\u1ef1a ch\u1ecdn Valtrix STING \u0111\u1ec3 x\u00e1c minh thi\u1ebft k\u1ebf RISC-V SoC<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/saigonbiz.com\/vn\/ultrarisc-lua-chon-valtrix-sting-de-xac-minh-thiet-ke-risc-v-soc\/\" \/>\n<meta property=\"og:locale\" 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